Semiconductor device technologies continue to evolve, providing higher chip density and operating frequencies. Fin-type field-effect transistors (FinFETs) are one type of transistor technology that is currently used to help provide desired device scaling while maintaining appropriate power consumption budgets.
A fin-type field effect transistor is a transistor that is formed with a fin of material. A fin is a relatively narrow width and relatively tall height structure that protrudes from the top surface of a semiconductor layer. The fin width is intentionally kept small to limit the short channel effect.
In a conventional FinFET, a gate conductor is positioned on the top surface of the semiconductor layer and over a portion of the fin. The gate conductor runs parallel to the top of the semiconductor layer and is perpendicular to the fin length such that the gate conductor intersects a portion of the fin. An insulator (e.g., gate oxide) separates the gate conductor from the fin. Further, the region of the fin that is positioned below the gate conductor defines a semiconductor channel region. The FinFET structure can include multiple fins, in which case the gate conductor would wrap around, as well as fill in, the space between these fins.
A semiconductor device may include different conductivity-type fin-type transistors, such as NFETs and PFETs. U.S. published patent application no. 2012/0138886 discloses an epitaxial stack of fins comprising a combination of silicon-germanium and silicon. After the fins have been formed, trenches are formed in the semiconductor layer, such as during a shallow trench isolation (STI) process.
As part of the STI process, a high temperature annealing process is typically performed to densify a dielectric material formed within the trenches so as to have a better dielectric property. However, the thermal budget associated with the annealing process is typically within a temperature range of 800-1100° C. for about 30 minutes. Unfortunately, this thermal budget may cause the fin to diffuse into the semiconductor layer, particularly when the fin includes silicon-germanium, for example.